I am conducting research on novel memory-centric computing systems. I tackle challenges by leveraging knowledge from a wide range of fields, including algorithms, architecture, circuits, and devices. Areas of expertise: Large Language Models, Computer Architecture, Computation-in-Memory, Resistive Random-Access Memory (ReRAM) Hobbies & Interests: Skiing (SAJ Level 2), Language Learning (Currently on a 900-day German streak on Duolingo!)
Jun 29, 2026
Will present a paper at the 8th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2026).
Jun 26, 2026
Will present a paper at the DA Symposium 2026.
Selected for the SLDM Excellent Presentation Award for FY2025 by the Special Interest Group on System and LSI Design Methodology (SLDM) of Information Processing Society of Japan (IPSJ).
Jun 22, 2026
Selected for the MEXT Supporting Pioneering Research through AI for 1,000 Discovery challenges Program (SPReAD).
Apr 1, 2026
Selected for the “Advanced Human Resource Development Leading Green Transformation (GX) (SPRING GX)” project at The University of Tokyo.
Apr 1, 2026
Enrolled in the Doctoral Program at The University of Tokyo.
Mar 24, 2026
Completed the Master's Program at The University of Tokyo.
Mar 15, 2026
Presented two papers at the 73rd JSAP Spring Meeting (in Japanese).
Feb 9, 2026
Paper published in the Japanese Journal of Applied Physics (JJAP).
Feb 5, 2026
Received an award in the Large Language Model (LLM) category at the “Chipathon (Semiconductor Design Hackathon)”, Graduate School of Engineering, The University of Tokyo.
Dec 3, 2025
Presented two papers at the Design Gaia 2025 (in Japanese).
Sep 18, 2025
Presented a paper at the International Conference on Solid State Devices and Materials (SSDM).
Jun 8, 2025
Presented a paper at the IEEE Silicon Nanoelectronics Workshop (SNW).
Aug 7, 2024
Presented a paper at The 8th cross-disciplinary workshop on computing Systems, Infrastructures, and programminG (xSIG 2024) and received the Best Research Award (in Japanese).
Apr 1, 2024
Enrolled in the Master's Program at The University of Tokyo.
Education
Apr 2026 - PresentThe University of Tokyo, Ph.D. in Electrical Engineering and Information Systems
Advisor: Prof. Ken Takeuchi
Apr 2024 - Mar 2026The University of Tokyo, Master of Engineering in Electrical Engineering and Information Systems
Advisor: Prof. Ken Takeuchi
Master's Thesis: “Research on Analysis of Changes in Current by Read-disturb on Multi-level Cell ReRAM and ReRAM Application for KV Cache of Large Language Models”
Apr 2020 - Mar 2024The University of Tokyo, Bachelor of Engineering in Electrical and Electronic Engineering
Thesis Advisors: Prof. Shuichi Sakai and Prof. Hidetsugu Irie
Graduation Thesis: “Microarchitecture Design of Dynamic Approximate Architecture Based on Execution Time,” (in Japanese)
Work Experience
Mar 2026 - Jul 2026Teaching Assistant, The University of Tokyo Assisted in teaching the course “Prototyping Experience to Shape Ideas - Prototype Design in the AI Era” for first- and second-year undergraduate students.
Oct 2022 - Sep 2025Part-time Engineer, TOWN, Inc. Responsible for building and operating cloud infrastructure using AWS and automating tests using Serverspec. Participated in a project to automate server construction using Microsoft Azure OpenAI.
Mar 2025 - Jul 2025Teaching Assistant, The University of Tokyo Assisted in teaching the course “Prototyping Experience to Shape Ideas - Prototype Design in the AI Era” for first- and second-year undergraduate students.
Oct 2024 - Dec 2024Teaching Assistant, The University of Tokyo Assisted in teaching the laboratory course “Approximate Computing for Machine Learning Applications” for third-year undergraduate students.
Aug 2024 - Sep 2024Research Internship, University of Leoben Conducted an IAESTE internship program on the analysis of X-ray diffraction spectra using neural networks. Mentor: Assoc. Prof. Ernst Gamsjäger
Feb 2024 - Jul 2024Teaching Assistant, The University of Tokyo Assisted in teaching the course “Prototyping Experience to Shape Ideas - From Robots to Home Appliances” for first- and second-year undergraduate students.
May 2024 - May 2024Teaching Assistant, The University of Tokyo Assisted in teaching the laboratory course “Analog Circuits” for third-year undergraduate students.
Mar 2024 - May 2024Teaching Assistant, The University of Tokyo Assisted in teaching the course “VLSI Architecture” for fourth-year undergraduate students.
Feb 2023 - Jul 2023Teaching Assistant, The University of Tokyo Assisted in teaching the course “Prototyping Experience to Shape Ideas - From Robots to Home Appliances” for first- and second-year undergraduate students and served as a teaching assistant coordinator.
Mar 2022 - Jul 2022Teaching Assistant, The University of Tokyo Assisted in teaching the course “Prototyping Experience to Shape Ideas - From Robots to Home Appliances” for first- and second-year undergraduate students.
Publications
Refereed
Journal Articles
Chihiro Matsui, Ayumu Yamada, Shota Suzuki, Naoko Misawa, and Ken Takeuchi, “NanoCiM: Nano-ReRAM Computation-in-Memory with Neural Network Weight-aware X-Address Scrambling to Suppress IR Drop-oriented Bit-line MAC Current Variation,”
IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI), vol. 3, no. 3, pp. 190-202, June 2026.
[DOI]
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Mapping strategy of quantized KV cache of LLMs into mixture of SLC and MLC ReRAM among various quantization methods,”
Japanese Journal of Applied Physics (JJAP), vol. 65, pp. 03SP09, Feb. 2026.
[DOI]
Koki Shibata, Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “CRISP: Partitioning LLM Inference Across Main Memory and HBM via Input Sparsification and Low-Rank Approximation,”
The 8th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2026), (Accepted).
Masafumi Higashi, Shota Suzuki, Yuya Yamamoto, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “KV Cache Management for Block Diffusion Language Models on Multi-Level NV-Memory,”
The 8th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2026), (Accepted).
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Hybrid SLC/MLC ReRAM for Quantized KV Cache in Transformer-based LLM,”
International Conference on Solid State Devices and Materials (SSDM) Poster Late News, September 17, 2025, pp. 755-756.
[DOI]
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Observation of State Change in 40nm TaOX ReRAM Cells during Read-disturb,”
IEEE Silicon Nanoelectronics Workshop (SNW), June 8, 2025, pp. 26-27.
[DOI]
Domestic Conferences
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Hybrid SLC/MLC ReRAM Mapping Scheme for Quantized KV Cache of LLMs Across Various Quantization Methods,” (Translated Title),
DA Symposium 2026 -System and LSI Design Methodology-, (Scheduled), (SLDM Excellent Presentation Award for FY2025).
Shota Suzuki, Yuya Degawa, Tomohiro Yoshita, Junichiro Kadomoto, Hidetsugu Irie, and Shuichi Sakai, “RTL Design and Soft Processor Implementation of an Architecture for Cycle-oriented Dynamic Approximation,”
The 8th cross-disciplinary workshop on computing Systems, Infrastructures, and programminG (xSIG 2024), August 7, 2024, pp. 1-14, (Best Research Award).
Non-Refereed
Domestic Conferences / Workshops
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Investigation of Current Fluctuations and RTN Frequency Change Induced by Read Stress in ReRAM,”
The 73rd JSAP Spring Meeting, March 15, 2026, 15a-M_123-10.
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “ReRAM Mapping Method Based on Bit-Level Error Robustness of Quantized KV Cache,”
The 73rd JSAP Spring Meeting, March 15, 2026, 15a-M_123-9.
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Investigation of ReRAM Mapping Techniques for Storing Quantized KV Cache in LLMs,”
IEICE Technical Report, vol. 125, no. 260, VLD2025-59, pp. 227-232, December 3, 2025, (SLDM Excellent Presentation Award for FY2025).
Shota Suzuki, Naoko Misawa, Chihiro Matsui, and Ken Takeuchi, “Changes in Read Current and RTN Frequency due to Read-disturb in 40nm TaOX ReRAM,”
IEICE Technical Report, vol. 125, no. 261, ICD2025-50, pp. 74-79, December 2, 2025.
Daichi Mikubo, Shota Suzuki, Shu Sugita, Junichiro Kadomoto, and Hidetsugu Irie, “Acceleration of speech feature extraction using an architecture with dynamically controllable computational precision,”
The 24th Forum on Information Technology (FIT 2025), September 4, 2025, CC-002.
Yifan Wang, Adil Padiyal, Daqi Lin, Shota Suzuki, Chihiro Matsui, and Ken Takeuchi, “A Design for Digital-CiM INT8 Transformer Accelerator with Pipeline,”
The 72nd JSAP Spring Meeting, March 14, 2025, 16a-K306-5.
Awards
Aug 2026 (Scheduled)SLDM Excellent Presentation Award for FY2025, Special Interest Group on System and LSI Design Methodology (SLDM) of Information Processing Society of Japan (IPSJ)
Recognized for the paper “Investigation of ReRAM Mapping Techniques for Storing Quantized KV Cache in LLMs,” presented at Design Gaia 2025 on December 3, 2025.
Aug 2026Qualcomm Award (Special Prize), “UTokyo AI Program Hackathon”, Qualcomm Japan, Microsoft Japan, and Graduate School of Engineering, The University of Tokyo
Developed a local AI health-check application on Snapdragon X-powered Surface Pro devices. Integrated webcam-based rPPG (remote photoplethysmography) and MediaPipe with local AI models for real-time vital analysis. Served as team leader for project planning and lead developer for evaluating rPPG tools and building data pipelines to local AI. Gained hands-on expertise in Python building on Windows ARM64 and Qualcomm NPU utilization.
Jul 20261st Place, Final Project Competition, “Web Engineering and Business Models”, Matsuo-Iwasawa Lab, Graduate School of Engineering, The University of Tokyo
Awarded 1st place out of 4 teams for proposing “DIY Blueprint Maker”, an application designed to generate custom DIY blueprints for complete beginners. Led the project concept and served as a technical domain advisor, leveraging experience in theater stage set design to ensure structural feasibility.
Feb 2026Award in the Large Language Model (LLM) Category, “Chipathon (Semiconductor Design Hackathon)”, Graduate School of Engineering, The University of Tokyo
Recognized in the LLM Track for developing and optimizing a system to execute a language model on an FPGA board.
Aug 2024Best Research Award, The 8th cross-disciplinary workshop on computing Systems, Infrastructures, and programminG (xSIG 2024)
Recognized for the paper “RTL Design and Soft Processor Implementation of an Architecture for Cycle-oriented Dynamic Approximation,” presented at xSIG 2024 on August 7, 2024.
Grants & Scholarships
2026.07Merit-Based Scholarship Repayment Exemption (Half-Exemption), Japan Student Services Organization (JASSO)
Awarded by the Japan Student Services Organization (JASSO) for outstanding academic and research achievements during the master's program.
Jul 2026 - Jan 2027Supporting Pioneering Research through AI for 1,000 Discovery challenges Program (SPReAD), Ministry of Education, Culture, Sports, Science and Technology (MEXT)
Research Project: “Creation of Highly Power-Efficient AI Hardware: Agent-Driven Autonomous Processing-in-Memory Design”
Role: Principal Investigator (PI)
Awarded a highly competitive research grant aimed at driving scientific innovation through advanced AI technologies.
Apr 2026 - Mar 2029The University of Tokyo “Advanced Human Resource Development Leading Green Transformation (GX) (SPRING GX)” Project student, JST Support for Pioneering Research Initiated by the Next Generation (SPRING) Program
Apr 2024 - Mar 2026Student Supporters Club Scholarship (Grant-type), The University of Tokyo Foundation
Certificates & Projects
Apr 2026Certificate of Completion, Deep Learning Advanced Course: Deep Generative Models, Matsuo-Iwasawa Lab, Graduate School of Engineering, The University of Tokyo
Completed an advanced practical program on the theory and implementation of deep generative models, including VAEs, GANs, Energy-Based Models, and Diffusion Models.
Oct 2025Certificate of Completion, AI and Semiconductor Course, Systems Design Lab and Matsuo-Iwasawa Lab, Graduate School of Engineering, The University of Tokyo
Completed a comprehensive program on semiconductor technologies, computer architecture, and hardware/software co-design for AI workloads.
Jul 2025Certificate of Completion, Deep Learning Basic Course, Matsuo-Iwasawa Lab, Graduate School of Engineering, The University of Tokyo
Completed a practical program on the fundamental theories of deep learning and its implementation (e.g., PyTorch, CNNs).
Sep 2024Internship Certificate, IAESTE (The International Association for the Exchange of Students for Technical Experience)
Completed an internship program at the University of Leoben on the analysis of X-ray diffraction spectra using neural networks.
Feb 2024Certificate of Completion, Global Consumer Intelligence (GCI) Program, Department of Technology Management for Innovation, The University of Tokyo
Completed a comprehensive data science and machine learning program (data analysis, predictive modeling using Python).
Nov 2023Go Global Gateway (GGG) Certificate of Recognition, Center of Global Education, The University of Tokyo
Awarded for active engagement in international activities, including an experiential learning program at KTH (Sweden), a short-term study abroad at the University of Hawaii, and serving as a UTokyo GUC Student Ambassador.
Sep 2023Participant, Boeing Externship Program 2023, Boeing Japan and Division of Engineering, Institute for Innovation in International Engineering Education, The University of Tokyo
Participated as part of the university course “Creativity Engineering Project for UnderGraduate IIID: International Aeronautical Sysytem Project Based Learning (PBL).”
Worked in a team to address practical challenges presented by Boeing Japan, developing and proposing solutions for aviation systems.